>> SSRAM

WEDC's family of SSRAM based Multi-Chip Packages (MCPs) are designed to give our customers a high density memory solution that also meets the wide data widths necessary for their applications. These high speed memories use synchronous inputs controlled by a positive-edge-triggered single-clock input including addresses, data and control.
Starting at a density of 2MB (16Mb) in x32 and x72 data width configurations these SSRAM memories provide many benefits such as; space savings versus single die packages, reduced I/O routing, reduced component count and placements, and extended temperature range testing including industrial and military.